Posts Tagged ‘asm’

Here’s the instruction set for Microchip’s Baseline devices.  These include the PIC10 series as well as some of the PIC12 and PIC16.

Opcode (binary) Mnemonic Description
0000 0000 0000 NOP No operation
0000 0000 0010 OPTION Load OPTION register with contents of W
0000 0000 0011 SLEEP Go into standby mode
0000 0000 0100 CLRWDT Reset watchdog timer
0000 0000 01ff TRIS f Move W to port control register (f=1..3)
 
0000 001 fffff MOVWF f Move W to f
0000 010 xxxxx CLRW Clear W to 0 (a.k.a CLR x,W)
0000 011 fffff CLRF f Clear f to 0 (a.k.a. CLR f,F)
0000 10d fffff SUBWF f,d Subtract W from f (d = f − W)
0000 11d fffff DECF f,d Decrement f (d = f − 1)
0001 00d fffff IORWF f,d Inclusive OR W with F (d = f OR W)
0001 01d fffff ANDWF f,d AND W with F (d = f AND W)
0001 10d fffff XORWF f,d Exclusive OR W with F (d = f XOR W)
0001 11d fffff ADDWF f,d Add W with F (d = f + W)
0010 00d fffff MOVF f,d Move F (d = f)
0010 01d fffff COMF f,d Complement f (d = NOT f)
0010 10d fffff INCF f,d Increment f (d = f + 1)
0010 11d fffff DECFSZ f,d Decrement f (d = f − 1) and skip if zero
0011 00d fffff RRF f,d Rotate right F (rotate right through carry)
0011 01d fffff RLF f,d Rotate left F (rotate left through carry)
0011 10d fffff SWAPF f,d Swap 4-bit halves of f (d = f<<4 | f>>4)
0011 11d fffff INCFSZ f,d Increment f (d = f + 1) and skip if zero
 
0100 bbb fffff BCF f,b Bit clear f (Clear bit b of f)
0101 bbb fffff BSF f,b Bit set f (Set bit b of f)
0110 bbb fffff BTFSC f,b Bit test f, skip if clear (Test bit b of f)
0111 bbb fffff BTFSS f,b Bit test f, skip if set (Test bit b of f)
 
1000 kkkkkkkk RETLW k Set W to k and return
1001 kkkkkkkk CALL k Save return address, load PC with k
101 kkkkkkkkk GOTO k Jump to address k (9 bits!)
1100 kkkkkkkk MOVLW k Move literal to W (W = k)
1101 kkkkkkkk IORLW k Inclusive or literal with W (W = k OR W)
1110 kkkkkkkk ANDLW k AND literal with W (W = k AND W)
1111 kkkkkkkk XORLW k Exclusive or literal with W (W = k XOR W)