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	<title>Beginner Micro &#187; devices</title>
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		<title>14 Bit PIC Instruction Set</title>
		<link>http://beginnermicro.com/blog/14-bit-pic-instruction-set/</link>
		<comments>http://beginnermicro.com/blog/14-bit-pic-instruction-set/#comments</comments>
		<pubDate>Thu, 21 May 2009 16:52:37 +0000</pubDate>
		<dc:creator>admin</dc:creator>
				<category><![CDATA[Blog]]></category>
		<category><![CDATA[Reference]]></category>
		<category><![CDATA[devices]]></category>
		<category><![CDATA[instruction set]]></category>
		<category><![CDATA[microchip]]></category>
		<category><![CDATA[midrange]]></category>
		<category><![CDATA[opcodes]]></category>

		<guid isPermaLink="false">http://beginnermicro.com/?p=334</guid>
		<description><![CDATA[The majority of devices in the PIC12 and PIC16 Midrange devices use this instruction set. It's very similar to the 12 Bit PIC Instruction Set but the increased opcode width allows 128 registers and 2048 words of code to be directly addressed.
]]></description>
			<content:encoded><![CDATA[<p>The majority of devices in the PIC12 and PIC16 Midrange devices use this instruction set. It&#8217;s very similar to the 12 Bit PIC Instruction Set but the increased opcode width allows 128 registers and 2048 words of code to be directly addressed.</p>
<table border="1">
<tbody>
<tr>
<th>Opcode (binary)</th>
<th>Mnemonic</th>
<th>Description</th>
</tr>
<tr>
<td><code>00 0000 0000 0000</code></td>
<td>NOP</td>
<td>No operation</td>
</tr>
<tr>
<td><code>00 0000 0000 1000</code></td>
<td>RETURN</td>
<td>Return from subroutine, W unchanged</td>
</tr>
<tr>
<td><code>00 0000 0000 1001</code></td>
<td>RETFIE</td>
<td>Return from interrupt</td>
</tr>
<tr>
<td><code>00 0000 0110 0010</code></td>
<td>OPTION</td>
<td>Write W to OPTION register</td>
</tr>
<tr>
<td><code>00 0000 0110 0011</code></td>
<td>SLEEP</td>
<td>Go into standby mode</td>
</tr>
<tr>
<td><code>00 0000 0110 0100</code></td>
<td>CLRWDT</td>
<td>Reset watchdog timer</td>
</tr>
<tr>
<td><code>00 0000 0110 01ff</code></td>
<td>TRIS f</td>
<td>Write W to tristate register f</td>
</tr>
<tr>
<td colspan="3"> </td>
</tr>
<tr>
<td><code>00 0000 1 fffffff</code></td>
<td>MOVWF f</td>
<td>Move W to f</td>
</tr>
<tr>
<td><code>00 0001 0 xxxxxxx</code></td>
<td>CLRW</td>
<td>Clear W to 0 (W = 0)</td>
</tr>
<tr>
<td><code>00 0001 1 fffffff</code></td>
<td>CLRF f</td>
<td>Clear f to 0 (f = 0)</td>
</tr>
<tr>
<td><code>00 0010 d fffffff</code></td>
<td>SUBWF f,d</td>
<td>Subtract W from f (d = f − W)</td>
</tr>
<tr>
<td><code>00 0011 d fffffff</code></td>
<td>DECF f,d</td>
<td>Decrement f (d = f − 1)</td>
</tr>
<tr>
<td><code>00 0100 d fffffff</code></td>
<td>IORWF f,d</td>
<td>Inclusive OR W with F (d = f OR W)</td>
</tr>
<tr>
<td><code>00 0101 d fffffff</code></td>
<td>ANDWF f,d</td>
<td>AND W with F (d = f AND W)</td>
</tr>
<tr>
<td><code>00 0110 d fffffff</code></td>
<td>XORWF f,d</td>
<td>Exclusive OR W with F (d = f XOR W)</td>
</tr>
<tr>
<td><code>00 0111 d fffffff</code></td>
<td>ADDWF f,d</td>
<td>Add W with F (d = f + W)</td>
</tr>
<tr>
<td><code>00 1000 d fffffff</code></td>
<td>MOVF f,d</td>
<td>Move F (d = f)</td>
</tr>
<tr>
<td><code>00 1001 d fffffff</code></td>
<td>COMF f,d</td>
<td>Complement f (d = NOT f)</td>
</tr>
<tr>
<td><code>00 1010 d fffffff</code></td>
<td>INCF f,d</td>
<td>Increment f (d = f + 1)</td>
</tr>
<tr>
<td><code>00 1011 d fffffff</code></td>
<td>DECFSZ f,d</td>
<td>Decrement f (d = f − 1) and skip if zero</td>
</tr>
<tr>
<td><code>00 1100 d fffffff</code></td>
<td>RRF f,d</td>
<td>Rotate right F (rotate right through carry)</td>
</tr>
<tr>
<td><code>00 1101 d fffffff</code></td>
<td>RLF f,d</td>
<td>Rotate left F (rotate left through carry)</td>
</tr>
<tr>
<td><code>00 1110 d fffffff</code></td>
<td>SWAPF f,d</td>
<td>Swap 4-bit halves of f (d = f&lt;&lt;4 | f&gt;&gt;4)</td>
</tr>
<tr>
<td><code>00 1111 d fffffff</code></td>
<td>INCFSZ f,d</td>
<td>Increment f (d = f + 1) and skip if zero</td>
</tr>
<tr>
<td colspan="3"> </td>
</tr>
<tr>
<td><code>01 00 bbb fffffff</code></td>
<td>BCF f,b</td>
<td>Bit clear f (Clear bit b of f)</td>
</tr>
<tr>
<td><code>01 01 bbb fffffff</code></td>
<td>BSF f,b</td>
<td>Bit set f (Set bit b of f)</td>
</tr>
<tr>
<td><code>01 10 bbb fffffff</code></td>
<td>BTFSC f,b</td>
<td>Bit test f, skip if clear (Test bit b of f)</td>
</tr>
<tr>
<td><code>01 11 bbb fffffff</code></td>
<td>BTFSS f,b</td>
<td>Bit test f, skip if set (Test bit b of f)</td>
</tr>
<tr>
<td colspan="3"> </td>
</tr>
<tr>
<td><code>10 0 kkkkkkkkkkk</code></td>
<td>CALL k</td>
<td>Save return address, load PC with k</td>
</tr>
<tr>
<td><code>10 1 kkkkkkkkkkk</code></td>
<td>GOTO k</td>
<td>Jump to address k (11 bits)</td>
</tr>
<tr>
<td colspan="3"> </td>
</tr>
<tr>
<td><code>11 00xx kkkkkkkk</code></td>
<td>MOVLW k</td>
<td>Move literal to W (W = k)</td>
</tr>
<tr>
<td><code>11 01xx kkkkkkkk</code></td>
<td>RETLW k</td>
<td>Set W to k and return</td>
</tr>
<tr>
<td><code>11 1000 kkkkkkkk</code></td>
<td>IORLW k</td>
<td>Inclusive or literal with W (W = k OR W)</td>
</tr>
<tr>
<td><code>11 1001 kkkkkkkk</code></td>
<td>ANDLW k</td>
<td>AND literal with W (W = k AND W)</td>
</tr>
<tr>
<td><code>11 1010 kkkkkkkk</code></td>
<td>XORLW k</td>
<td>Exclusive or literal with W (W = k XOR W)</td>
</tr>
<tr>
<td><code>11 110x kkkkkkkk</code></td>
<td>SUBLW k</td>
<td>Subtract W from literal (W = k − W)</td>
</tr>
<tr>
<td><code>11 111x kkkkkkkk</code></td>
<td>ADDLW k</td>
<td>Add literal to W (W = k + W)</td>
</tr>
</tbody>
</table>
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